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Dynamic power management of voltage-frequency island partitioned Networks-on-Chip using Intel's Single-chip Cloud Computer

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4 Author(s)
Radu David ; Carnegie Mellon University, 5000 Forbes Avenue, Pittsburgh, PA 15206, USA ; Paul Bogdan ; Radu Marculescu ; Umit Ogras

Continuous technology scaling has enabled the integration of multiple cores on the same chip. To overcome the disadvantages of buses, the Network-on-Chip (NoC) architecture has been proposed as a new communication paradigm. To further mitigate the tradeoff between performance and power consumption, dynamic voltage and frequency scaling (DVFS) became the de facto approach in multi-core design. DVFS-based NoC communication was implemented in Intel's most recent Single-chip Cloud Computer (SCC). Using the SCC we demonstrate a power management algorithm that runs in real time and dynamically adjusts the performance of the islands to reduce power consumption while maintaining the same level of performance.

Published in:

Networks on Chip (NoCS), 2011 Fifth IEEE/ACM International Symposium on

Date of Conference:

1-4 May 2011