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Design of a generalized priority queue manager for ATM switches

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4 Author(s)
Chao, H.J. ; Dept. of Electr. Eng., Polytech.. Univ., Brooklyn, NY, USA ; Hsiling Cheng ; Yau-Ren Jenq ; Daein Jeong

Meeting quality of service (QoS) requirements for various services in ATM networks has been very challenging to network designers. Various control techniques at either the call or cell level have been proposed. In this paper, we deal with cell transmission scheduling and discarding at the output buffers of an ATM switch. We propose a generalized priority queue manager (GPQM) that uses per-virtual-connection queueing to support multiple QoS requirements and achieve fairness in both cell transmission and discarding. It achieves the ultimate goal of guaranteeing the QoS requirement for each connection. The GPQM adopts the earliest due date (EDD) and self-clocked fair queueing (SCFQ) schemes for scheduling cell transmission and a new self-calibrating pushout (SCP) scheme for discarding cells. The GPQM's performance in cell loss rate and delay is presented. An implementation architecture for the GPQM is also proposed, which is facilitated by a new VLSI chip called the priority content-addressable memory (PCAM) chip

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Selected Areas in Communications, IEEE Journal on  (Volume:15 ,  Issue: 5 )