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High-pass (HP) delta-sigma (ΔΣ) modulators possess the qualities of high immunity to low-frequency noise and direct digitisation at intermediate frequency (IF) stage,. This paper presents three loop-filter alternatives for second-order HP ΔΣ modulator and performs a comparative analysis. The two of the three architectures have already been utilized for low-pass (LP) modulators while the third one has not been explored before. This particular topology mitigates the shortcomings of the other two modulator architectures. It is a mixture of feedforward and feedback structures and hence takes advantages of both of them. The topology is less sensitive to the nonlinearities of the operational transconductance amplifiers (OTAs) and hence has low distortion. The output swing requirements of the OTA are minimized as they just process the quantization noise. This way the design of the OTA is fairly relaxed with reduced power consumption. The analog adder before the quantizer is also simplified as there are just two branches to add in contrast to three branches for pure feedforward topologies. This makes the modulator more robust against comparator offset, hysteresis and metastability. Hence this adder can be implemented passively without increasing the design requirements on comparator enormously.