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A novel double-bound hysteretic control of multi-phase switched-capacitor (SC) converters is presented. The technique adjusts the number of interleaved phases with the output load to significantly reduce the operating frequency of the control comparator, enabling the practical application of hysteretic control with large number of interleaved phases. Using the proposed technique, the maximum required speed of the hysteretic comparator is reduced from 7.3 Ghz to 1.8 Ghz in a 16-phase 2:1 SC converter, designed in 65-nm CMOS process. In addition, the achieved dynamic response with such control is much faster than any reported integrated converter. For a 1.2-V input voltage and 0.45-V output voltage, the regulator enables a 35-mVpp output droop for a 50% load step, without using a decoupling capacitor. In addition, the output for a 100-mV input reference step settles in 2.8-ns. The SC converter's efficiency is not affected by such reconfigurable interleaving scheme and reaches 81%.
Date of Conference: 15-18 May 2011