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A 2.4µW Wake-up Receiver for wireless sensor nodes with −71dBm sensitivity

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3 Author(s)
Hambeck, C. ; Inst. of Comput. Technol., Vienna Univ. of Technol., Vienna, Austria ; Mahlknecht, S. ; Herndl, T.

This paper presents a complete ultra-low power receiver with direct down conversion architecture. It is designed as Wake-up Receiver for wireless sensor nodes. The 130nm CMOS chip includes envelope detector, low noise baseband amplifier, PGA, mixed-signal correlation unit and auxiliaries for stand-alone operation. At 868MHz, a receiver sensitivity of -71dBm is achieved with total power consumption of 2.4μW at 1.0V supply by means of baseband correlation over 7ms with 64 bit pattern, 99% detection probability and a false wake-up rate of 103/s.

Published in:

Circuits and Systems (ISCAS), 2011 IEEE International Symposium on

Date of Conference:

15-18 May 2011