Analysis of random capacitor mismatch errors in pipeline analog-to-digital converters

A new modeling and analysis of the nonlinearities caused by the capacitor mismatch errors in the pipeline analog- to-digital converters (ADCs) is presented. Error in each stage is modeled by an input-referred gain error and a nonlinear term. A method is proposed for calculation of the ADC integral nonlinearity (INL) from the total input referred error. Analytical expressions for estimation of the ADC INL in terms of standard deviation of random capacitor mismatch errors are derived. The proposed model is verified by system-level Monte Carlo simulations.