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Future computer systems will require new levels of computing power and hence new levels of core and chip densities. Because of constraints on power and area, optical interconnection networks will play a critical role in these new systems. In this paper, we describe the macrochip, a multi-chip node with an embedded silicon photonic interconnection network that consists of thousands of optical links. For such a large-scale wavelength division multiplexing optical network, we show how to use an energy-efficient error control scheme employing variable-length cyclic redundancy check codes to achieve a desirable residual bit error rate (BER) of 10-23 for reliable system operation with the individual link BER at 10-12 or higher. We use a discrete-event network simulation of the macrochip using uniform random traffic to show that our scheme incurs minimal impact on performance compared to a perfect system with no error control. Using link level energy efficiency and network throughput analysis, we estimate and report network level energy efficiency using the metric of energy per useful bit.