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Pulse-based dead-time compensation method for selfbalancing space vector pulse width-modulated scheme used in a three-level inverter-fed induction motor drive

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3 Author(s)
Patel, P.J. ; Dept. of Electr. Eng., Sankalchand Patel Coll. of Eng., Visnagar, India ; Patel, V. ; Tekwani, P.N.

This study describes the effect of dead-time and how to develop dead-time compensation with self-balancing space vector pulse width modulated (SVPWM) for the three-level neutral-point clamped (NPC) topology typically used for high-power induction motor (IM) drives. The dead-time necessary to prevent the short circuit of the power supply in pulse width-modulated (PWM), voltage source inverters (VSIs) results in output voltage deviations. Although individually small, when accumulated over an operating cycle, the voltage deviations are sufficient to distort the applied PWM signal. This study presents a method to correct for the dead-time deviations for a three-level inverter. The proposed pulse-based compensator is less hardware and more software intensive than other dead-time compensation methods. It provides a low-cost solution. Analysing the effects of dead-time on a pulse-by-pulse basis and correcting each pulse accordingly develop the pulse-based technique. The pulse-based dead-time compensation (PBDTC) method with the SVPWM scheme is implemented using a digital signal processor (DSP)-TMS320F2811. The technique is intensively simulated and then evaluated through experimental results on 45 kW (60 HP) IM. The proposed scheme is applicable to any multi-level inverter topology operating on SVPWM.

Published in:

Power Electronics, IET  (Volume:4 ,  Issue: 6 )