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A circuit disassembly technique for synthesizing symbolic layouts from mask descriptions

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2 Author(s)
Bill Lin ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Newton, A.R.

A technique, called circuit disassembly, for transforming a mask-level description into an equivalent symbolic layout is described. This technique has been implemented in a program that can handle physical layouts containing arbitrary Manhattan geometry. Circuits designed using mask-level layout systems can be disassembled automatically, independent of the circuit technology, into a symbolic environment. Once converted, the disassembled layout can be manipulated further by existing symbolic design or verification tools. A key motivation for symbolic representation is the relative ease of retargeting designs for new process technologies. Industrial symbolic compaction systems can be used for this purpose. The formulation of the problem consists of two major steps: device extraction and net decomposition. The first step involves extracting transistors and contacts from the layout. New symbolic primitives are generated if available library elements are insufficient. The second step aims at synthesizing symbolic wires from the remaining mask geometry for interconnecting the circuit primitives

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:9 ,  Issue: 9 )

Date of Publication:

Sep 1990

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