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Communication-efficient implementation of block recursive algorithms on distributed-memory machines

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4 Author(s)
Gupta, S.K.S. ; Dept. of Comput. & Inf. Sci., Ohio State Univ., Columbus, OH, USA ; Huang, C.-H. ; Johnson, R.W. ; Sadayappan, P.

This paper presents a design methodology for developing efficient distributed-memory parallel programs for block-recursive algorithms such as the fast Fourier transform and bitonic sort. This design methodology is specifically suited for most modern supercomputers having a distributed-memory architecture with circuit-switched or wormhole routed mesh or hypercube interconnection network. A mathematical framework based on the tenser product and other matrix operations is used for representing algorithms. Communication-efficient implementations with effectively overlapped computation and communication are achieved by manipulating the mathematical representation using the tenser algebra. Performance results for FFT programs on the Intel iPSC/860 and Intel Paragon are presented

Published in:

Parallel and Distributed Systems, 1994. International Conference on

Date of Conference:

19-22 Dec 1994