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In this paper different methods and novel tools for nondestructive failure localization and high resolution material analysis in 3D integrated devices will be discussed. The employed methodologies combine non-destructive fault localization with efficient and accurate target preparation to gain access for the following microstructure analysis, forming a subsequent failure analysis workflow. The concepts presented here involve the application of improved Lock-In Thermography (LIT) as well as different innovative concepts of high rate Focused Ion Beam (FIB) techniques and high resolution material characterization utilizing Electron Backscatter Diffraction (EBSD) and Transmission Electron Microscopy (TEM) with Nanospot Energy Dispersive X-ray Spectroscopy (EDS). In the first part of the paper the potential and the advantages of each of the techniques will be demonstrated with respect to their application for Through Silicon Via (TSV) technologies by means of different case studies. To illustrate the complete workflow of the approach, a failure analysis of a vertically integrated microsystem using a micro-bump technology is described in the second part.