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Solder/adhesive bonding using simple planarization technique for 3D integration

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4 Author(s)
Nimura, M. ; Waseda Univ., Tokyo, Japan ; Mizuno, J. ; Sakuma, K. ; Shoji, S.

This paper describes a hybrid solder/adhesive bonding method using a simple planarization technique for three-dimensional (3D) integration. With the hybrid bonding method, the chip bonding and encapsulation of underfill resin between chips is completed in one step. The simple planarization technique is used to planarize adhesive on a flat Si substrate coated with a release agent. The planarization technique is a simple and inexpensive operation compared to the conventional processes using Chemical Mechanical Polishing (CMP) or fly cutting. Since the CMP process has advantages for wafer-level fabrication, we also evaluated hybrid bonding using CMP. The results of the simple planarization process show that the spaces around the Cu/Sn bumps were fully filled with the adhesive, and the adhesive residual layer on the Cu/Sn bumps was removed by O2 plasma. A cross-sectional SEM image after the hybrid bonding using the proposed planarization process shows that the Cu/Sn solder had properly wetted the Au and the adhesive had uniformly filled the small gaps between the bonded chips. Solder/adhesive bonding using CMP was also succeeded. In addition, Au/adhesive bonding with 10-μm pitch Au bumps was realized.

Published in:

Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st

Date of Conference:

May 31 2011-June 3 2011