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Reliability of Cu pillar on substrate interconnects in high performance flip chip packages

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3 Author(s)
Katkar, R. ; Tessera, Inc., San Jose, CA, USA ; Huynh, M. ; Mirkarimi, L.

In this work, we compare the reliability performance of Cu pillar-on-substrate interconnects against Cu pillar-on-die and conventional thin-Cu-UBM with solder-on-substrate-pad (SOP) interconnects within fine pitch Pb-free flip chip packages. Our ongoing results indicate a superior electromigration (EM) lifetime for pillar-on-substrate structures compared to thin-Cu-UBM interconnects. While the primary failure mechanism, the formation of voids and the depletion of the UBM in the cathode bumps, remains similar in both the interconnect structures, severe damage to the substrate side is observed only within the SOP structures. Moreover, the pillar-on-substrate interconnects show enhanced temperature cycling performance compared to pillar-on-die interconnects with 50% performance improvement at 1% failure rate.

Published in:

Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st

Date of Conference:

May 31 2011-June 3 2011

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