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Design, simulation and process optimization of AuInSn low temperature TLP bonding for 3D IC Stacking

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11 Author(s)
Ling Xie ; Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore ; Won Kyoung Choi ; Premachandran, C.S. ; Selvanayagam, C.S.
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An IMC based low temperature solder <;200°C with AuInSn composition is developed for 3D IC stacking application. Thermodynamic and mechanical simulations are conducted to study the phase change during the melting temperature and the stress due to the thin solder material. A three layer stack bonding with the developed solder has been characterized after bonding and reliability test. It is found that no degradation in shear strength and compositional structure of the solder and is verified by the TEM cross sectional structure with EDX analysis. A 3D IC structure with TSV test vehicle is designed and demonstrated the low temperature solder application. C2W bonding approach is used for the 3D IC stack bonding method and is found suitable for devices with TSV structure. Final reliability test with daisy chain structure and TSV showed <;10% resistance increase in majority of interconnections after 1000 cycles of thermal cycle test.

Published in:

Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st

Date of Conference:

May 31 2011-June 3 2011

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