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Low cost, chip-last embedded ICs in thin organic cores

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5 Author(s)
Nitesh Kumbhat ; Packaging Research Center, Georgia Institute of Technology, 813 Ferst Dr NW, Atlanta, GA 30332 ; Fuhan Liu ; Venky Sundaram ; Georg Meyer-Berg
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This paper presents a novel technology to enable chip embedding in 1 or 2 metal layer substrates using chip-last embedding for its merits. The novel structure is obtained by embedding thin-chips within the core instead of the build-up layers as has been demonstrated previously [1]. To enable the smallest profile embedded die structure, results from the three critical elements of the technology- 1) fine lines and spaces on core, 2) small-diameter fine-pitch area-array through-holes, and 3) thermo-mechanical reliability of small diameter through-holes have been discussed in the paper. Lines and spaces as small as 7μm were demonstrated on core laminate by using build-up type processes. Copper-filled through-holes of 30-60μm diameters were successfully fabricated and shown to pass 1300 thermal cycles from -55°C to 125°C. In addition, through-hole drilling process was optimized to achieve ultra-fine pitches of 70-100μm. Comprehensive analysis of three new materials and associated fabrication processes, carried out to demonstrate the advantages and robustness of this manufacturing-friendly 1-2 metal layer chip-last embedding technology emphasizes that it is a promising technology to achieve ultra-miniaturization for future embedded systems and sub-systems.

Published in:

2011 IEEE 61st Electronic Components and Technology Conference (ECTC)

Date of Conference:

May 31 2011-June 3 2011