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Thermal reliability of fine pitch Cu-Cu bonding with self assembled monolayer (SAM) passivation for Wafer-on-Wafer 3D-Stacking

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5 Author(s)
L. Peng ; Institute of Microelectronics, A∗STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore, Science Park II, Singapore 117685 ; H. Y. Li ; D. F. Lim ; S. Gao
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Three-dimensional integrated circuit (3D IC) is a technology that has the potential to overcome conventional scaling limits by reducing signal propagation delay and power consumption. Wafer-on-Wafer 3D-Stacking is a more practical option for high throughput manufacturing of 3D IC. It is important to ensure excellent electrical, mechanical and thermal properties of the bonding interface for robustness and long term reliability. Cu-Cu bonding has advantage in terms of excellent scalability which enables fine pitch vertical interconnect formation, providing a promising technique to meet future high density 3D IC requirement. In this work, we study the improvement in the contact resistance of the bonded Cu-Cu contacts with self-assembled monolayer (SAM) passivation prior to bonding and the thermal endurance of these contacts. A reduction of ~7.1% in the contact resistance is observed with the application of SAM for bonding at 350°C. We further show that SAM passivation is extendible to the formation of high density fine-pitch Cu-Cu bonding with 100% bonding yield that sustains extreme thermal cycling.

Published in:

2011 IEEE 61st Electronic Components and Technology Conference (ECTC)

Date of Conference:

May 31 2011-June 3 2011