Close category search window
 

45nm Yield model optimization

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Walsh, B.L. ; IBM Syst. & Technol. Group, Hopewell Junction, NY, USA ; Colt, J. ; Poindexter, D. ; Joseph, T.

Elements of a yield model combining multiple input metrics will be reviewed. This model has been applied to multiple products across 65nm and 45nm SOI technology nodes. It provides long term yield metrics as well as yield diagnostics. Focus will be on the addition of After Develop Inspection (ADI) yield metrics into an existing framework which incorporates high resolution defect scans (PLY) and scribe kerf electrical test data.

Published in:
Advanced Semiconductor Manufacturing Conference (ASMC), 2011 22nd Annual IEEE/SEMI

Date of Conference: 16-18 May 2011

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.