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Test structure for mismatch characterization of MOS transistors in subthreshold regime

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6 Author(s)
M. Conti ; Dept. of Electron., Ancona Univ., Italy ; G. F. Dalla Betta ; S. Orcioni ; G. Soncini
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This paper proposes a simple test circuit for characterization of MOS transistor mismatch in a standard 2 μm CMOS technology. Measurements have been performed both in the saturation and subthreshold regimes in order to obtain an accurate characterization in a wide range of operations. The parameter mismatch estimation algorithm is based on Multiple Linear Regression and is able to furnish information on the estimation accuracy

Published in:

Microelectronic Test Structures, 1997. ICMTS 1997. Proceedings. IEEE International Conference on

Date of Conference:

17-20 Mar 1997