Referenced Items are not available for this document.
Stanford's test chip environment has been used to rapidly prototype a SiGe TFT process. The environment selected test structures tailored for the device/process. Then, with minimal effort and using parameterized test structures, the designer assembled a diagnostic test module. This module was used successfully in the development and optimization of the process, leading to the fabrication or high performance SiGe TFTs
Published in:
Microelectronic Test Structures, 1997. ICMTS 1997. Proceedings. IEEE International Conference on
Date of Conference: 17-20 Mar 1997
- Page(s):
- 143 - 145
- Meeting Date :
- 17 Mar 1997-20 Mar 1997
- Print ISBN:
- 0-7803-3243-1
- INSPEC Accession Number:
- 5665292
- Conference Location :
- Monterey, CA
- Digital Object Identifier :
- 10.1109/ICMTS.1997.589363
- Product Type:
- Conference Publications
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