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Ultra-high speed, low power monolithic photoreceiver using InP/lnGaAs double-heterojunction bipolar transistors

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5 Author(s)
Sano, E. ; NTT Syst. Electron. Lab., Atsugi ; Sano, K. ; Otsuji, T. ; Kurishima, K.
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A first 40 Gbit/s RZ response is successfully obtained for monolithic photoreceivers by using a PIN/DHBT configuration in which the PIN-PD is formed on the layer structure that corresponds to the base-to-collector region of the DHBTs. The power dissipation of the photoreceiver is only 54 mW

Published in:
Electronics Letters  (Volume:33 ,  Issue: 12 )

Date of Publication: 5 Jun 1997

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