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Sub 0.5 μm TCP metal etching in the ASTC

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4 Author(s)
Christie, R. ; East Fishkill Facility, IBM ASTC, Hopewell Junction, NY, USA ; Burns, S. ; Grewal, V.S. ; Spuler, B.

Summary form only given, as follows. The IBM Advanced Technology Center (ASTC) has alliances with the Siemens Corporation and Toshiba for 64M and 256M DRAM process development, state of the art equipment in a state of the art facility, has allowed for quick development of processes for these technologies. High density DRAM technologies have moved metal etching into the sub 0.5 μm regime. These smaller geometries place demanding requirements on metal etch processing. With an increase in wafer size and pattern density, it becomes increasingly difficult to produce uniform profiles across a wafer. Unlike other films, metal etching requires post etch treatment to prevent the onset of corrosion. In a manufacturing environment, low cost of ownership and good tool reliability are essential. This paper discusses sub 0.5 μm aluminum etching in a 200 mm LAM TCP 9600 Etch Chamber and post etch wafer treatment. Chemistries, powers, and pressures have been optimized to produce higher selectivities (<5:1) to photoresist, less RIE lag (<15%), and more uniform profiles across a wafer, better particle control and the extended life of etch tool hardware with these parameter optimizations are also discussed

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop. 1994 IEEE/SEMI

Date of Conference:

14-16 Nov 1994

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