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A High Performance and Low Power Logic CMOS Compatible Embedded 1Mb CBRAM Non-Volatile Macro

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5 Author(s)
Hollmer, S. ; Adesto Technol. Inc., Sunnyvale, CA, USA ; Gilbert, N. ; Dinh, J. ; Lewis, D.
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This paper describes the implementation of a low power and high performance embedded non-volatile memory macro utilizing conductive bridging random access memory (CBRAM) in a standard logic CMOS 130nm Process. A 1MBit embedded non-volatile memory (NVM) macro is presented that reduces write power per bit by more than one order of magnitude over state of art flash to less than 5pJ, while write performance is improved from ms range to less than 250ns and read random access time of less than 20ns is demonstrated. Detail building blocks are descried and low energy write operation is demonstrated.

Published in:

Memory Workshop (IMW), 2011 3rd IEEE International

Date of Conference:

22-25 May 2011