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UTBOX and ground plane combined with Al2O3 inserted in TiN gate for VT modulation in fully-depleted SOI CMOS transistors

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32 Author(s)
Fenouillet-Beranger, C. ; CEA-LETI MINATEC, Grenoble, France ; Perreau, P. ; Casse, M. ; Garros, X.
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Thin film devices (FDSOI) are among the most promising candidates for next device generations due to their better immunity to short channel effects (SCE). In addition, the introduction of high-k and metal gate has greatly improved the MOSFETs performance by reducing the electrical oxide thickness (CET) and gate leakage current. However, if midgap metal gate is sufficient to provide a high symmetrical threshold voltage (VT~0.45V) for both NMOS and PMOS devices [1], still one major challenge is to provide VT modulation with an undoped channel in order to satisfy the low power (LP) circuit design requirements [2-5]. To overcome this issue, combining UTBOX substrate with ground plane (GP) has been proposed [2,5]. However this technique with midgap metal gate requires a FBB biasing in order to realize low VT that's implies a disruptive circuits design to avoid forward diode biasing in the substrate between the two opposite GP type beneath the BOX [6]. In order to introduce more VT modulation flexibilities and especially for LVT PMOS and HVT NMOS, aluminum Oxide (Al2O3) inserted in TiN gate stack has been proposed for bulk devices [7-8] in a gate first process. The viability of this option is studied in this paper for FDSOI, for HfO2 and HfSiON gate oxide, through transistors performance, reliability and variability analysis.

Published in:

VLSI Technology, Systems and Applications (VLSI-TSA), 2011 International Symposium on

Date of Conference:

25-27 April 2011