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The origin of abrupt turn-on characteristics observed in an independent double-gate NW transistor at cryogenic ambient is studied in this paper. It is found that the occurrence of this behavior is greatly influenced by L, T, and drain bias. A model taking into account the dopant distribution of an implanted gate is proposed to interpret our findings. It suggests that the non-intentionally formed barriers at the channel edge give rise to carrier trapping effects until an adequately large gate voltage is applied to lower the magnitude of the barriers for the trapped electrons to flow to the drain.