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Built-in self-test design of current-mode algorithmic analog-to-digital converters

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1 Author(s)
Chin-Long Wey ; Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA

Analog MOS circuits are becoming increasingly sophisticated in terms of checking and correcting themselves. Self-correcting, self-compensating, or self-calibrating techniques has been employed in analog-to-digital (A/D) converters to eliminate errors caused by offset and low frequency noise, and to cancel the error effect. However, the self-compensating/calibration techniques may no longer work properly in the presence of faulty switching elements. This paper presents the fault behaviors and test generation of a current-mode algorithmic A/D converter, where the single stuck-at faults in the switching elements of the converter are assumes. The converter requires only two test currents to achieve a full testability. Due to the simplicity of generating test currents and the expected outputs, a simple built-in self-test (BIST) structure is proposed. Two extra pins for test enable signal and error indicator are needed. Results show that the full self-testability of the BIST structure is achieved with a low pin/hardware overhead, and the use of expensive test equipment is not necessary

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Instrumentation and Measurement, IEEE Transactions on  (Volume:46 ,  Issue: 3 )