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By progressively lowering the gate-base level in the charge pumping (CP) measurement, the channel accumulation layer is caused to advance into the LDD gate-drain overlap and spacer-oxide regions, extending the interface that can be probed. This constitutes the basis of a new technique that separates the hot-carrier-induced interface states in the respective regions. Linear drain current degradation, measured at low and high gate bias, provides clear evidence that interface state generation initiates in the spacer region and progresses rapidly into the overlap/channel regions with stress time in a two-stage mechanism, involving first a series resistance increase and saturation, followed by a carrier mobility reduction.
Date of Publication: June 1997