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Automatic synthesis of an 8-bit CPU with 100% on-line error detection capability

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5 Author(s)
Markas, T. ; Data Commun. Technol., Research Triangle Park, NC, USA ; Edwards, E. ; Wang, S. ; Medero, J.
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This paper presents the use of a CAD system that allows the automatic synthesis of integrated circuits with on-line, 100% error detection capability. An 8-bit CPU serves as a benchmark to demonstrate the circuit technology used to automatically synthesize this type of circuit. The paper presents results on the actual design of the benchmark circuit and the use of the CAD system that made the design possible

Published in:

Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on  (Volume:2 )

Date of Conference:

13-16 Oct 1996