By Topic

Using MTBDDs for discrete timed symbolic model checking

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Kropf, T. ; Inst. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany ; Ruf, J.

The verification of timing properties is an important task in the validation process of embedded and real time systems. Temporal logic model checking is one of the most successful techniques as it allows the complete automation of the verification. In this paper, we present a new approach to symbolic QCTL (Quantitative CTL) model checking. In contrast to previous approaches we use an intuitive QCTL semantics, provide an efficient model representation and the new algorithms require less iteration steps compared to translating the QCTL problem into CTL and using standard CTL model checking techniques. The new model checking algorithm is based on a MTBDD representation. Some experimental results show the efficiency of the new approach

Published in:

European Design and Test Conference, 1997. ED&TC 97. Proceedings

Date of Conference:

17-20 Mar 1997