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Performance implications of the PowerPC architecture's hashed page table utilization in Windows NT

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1 Author(s)
VandenBrink, M. ; RISC Software, Motorola Inc., Austin, TX

Windows NTTM is a portable operating system, and as such has an abstracted view of the underlying processor architecture. One of the most processor-specific portions of an operating system is the management of virtual memory, and NT is no different in this respect. NT abstracts the processor-specific address translation mechanism and manages it as a translation lookaside buffer (TLB). This paper examines the performance ramifications of this abstraction when using the hashed page table (HTAB) on the PowerPCTM1 architecture

Published in:

Performance, Computing, and Communications Conference, 1997. IPCCC 1997., IEEE International

Date of Conference:

5-7 Feb 1997

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