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Coplanar bus model validation using test board and high speed CMOS driver

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2 Author(s)
Otsuka, K. ; Coll. of Inf., Meisei Univ., Tokyo, Japan ; Ichise, A.

Test vehicles consisting of a special arrangement of test boards each mounted with high speed CMOS drivers were prepared for validation of a high speed coplanar bus model. Actual wave delay and deformation through several lines were measured and compared with those in a coplanar line, a stand alone line and a microstrip line. The coplanar bus line was superior to even a microstrip line with a ground and power plane at frequencies on the order of several hundred MHz. It was concluded that the most important feature for circuits operating in the range of hundreds of MHz frequency is the closed loop current

Published in:

Performance, Computing, and Communications Conference, 1997. IPCCC 1997., IEEE International

Date of Conference:

5-7 Feb 1997