Skip to Main Content
To achieve delay balance, instead of making the faster path slower by elongating branches, we make slower paths faster by sizing. Given a general clock network, which may includes loops, together with a set of feasible widths for each branch, we formulate the optimal sizing of the clock network as a constrained optimization problem. By turning the skew minimization problem into a least-squares estimation problem, a modified Gauss-Marquardt's method is used to determine the optimal widths. An efficient initial sizing algorithm is proposed to speed up the sizing process. Instead of using zero-order delay model (path length) or one-order delay model (Elmore delay), we employ a generalized delay model which can handle general RLC and transmission line networks. Experimental results show that this method significantly reduces both the clock skew and path delays from source to terminals.