A new deterministic BIST approach to generate a set of test vectors is proposed. Given a set ofpre-computed test vectors (obtained by an ATPG tool) with a predetermined fault coverage, a simple test vector generator (TVG) based on a cellular automata (CA) structures is synthesized to generate the given test set.
Published in:
Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on
Date of Conference: 7-11 Nov. 1993