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Nyquist data converter testing and yield analysis using behavioral simulation

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2 Author(s)
E. W. Y. Liu ; Dept. of EECS, California Univ., Berkeley, CA, USA ; A. L. Sangiovanni-Vincentelli

This paper presents a strategy for testing all DC performance of Nyquist data converters including offset error, full scale gain error, integral nonlinearity, and differential nonlinearity. In contrast to previous testing strategies based on linear models that require accurate measurements of circuit performance, our strategy uses a simpler measurement to verify that a circuit performance parameter falls within certain detection thresholds in the presence of measurement noise. Using the proposed strategy, we can evaluate tradeoffs between test set size, test coverage, detection thresholds, measurement noise, chip performance, and estimated yield. Our results support the obvious that smaller measurement noise, stricter detection thresholds, and lower chip performance would require smaller test set and reduce test time. Stricter detection thresholds, on the other hand, would decrease estimated yield.

Published in:

Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on

Date of Conference:

7-11 Nov. 1993