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Embedded totally self-checking checkers: a practical design

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2 Author(s)
Kundu, S. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Reddy, S.M.

In a totally self-checking (TSC) design, the circuit detects errors by monitoring redundantly coded data/control paths through a TSC checker. A problem arises when not all these code words are on the monitored lines during normal operation. A method of designing checkers that solves this difficulty is proposed. The method uses TSC checkers based on flip-flops instead of using the mostly combinational checkers now available. Two design applications are presented: TSC checkers for arithmetic AN codes, and a TSC iterative logic array.<>

Published in:

Design & Test of Computers, IEEE  (Volume:7 ,  Issue: 4 )

Date of Publication:

Aug. 1990

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