By Topic

Quality-driven SoC architecture synthesis for embedded applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Jozwiak, L. ; Eindhoven Univ. of Technol., Eindhoven, Netherlands

The recent spectacular progress in modern nanoelectronics created a big stimulus towards development of SoCs for embedded applications. Unfortunately, it also introduced unusual silicon and system complexity and heterogeneity, which result in many serious SoC development issues. Additional difficult to solve issues are due to very high throughput and low energy demands of many modern embedded applications. These issues cannot be resolved without new more adequate system architecture concepts, as well as, methods and EDA-tools for an adequate system-level design exploration and multi-objective optimal system architecture synthesis. This tutorial discusses the problems of multi-objective optimal architecture synthesis and trade-off exploitation for complex hard real-time embedded heterogeneous multi-processor SoCs, and model-based semi-automatic architecture synthesis methods that enable its effective and efficient solution. It thoroughly discusses the abstract models of the architecture design issue that involve the abstract system behavior models, system platform models and multi-objective decision models, as well as, the construction of the models and their usage for the actual system architecture exploration and multi-objective optimal architecture synthesis. In the role of examples, it uses the system architecture exploration and synthesis methods and the corresponding EDA-tools that we recently developed, and the SoC architectures synthesised with our tools for several real-world designs related to the newest highly demanding wireless communication and multimedia standards.

Published in:

SOC Conference (SOCC), 2010 IEEE International

Date of Conference:

27-29 Sept. 2010