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Impact of shielding line on CDM ESD robustness of core circuits in a 65-nm CMOS process

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3 Author(s)
Ming-Dou Ker ; Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu, Taiwan ; Chun-Yu Lin ; Tang-Long Chang

The charged-device-model (CDM) ESD robustness of core circuit with/without the shielding line was studied in a 65-nm CMOS process. Verified in silicon chip, the CDM ESD robustness of core circuit with the shielding line was degraded. The damage mechanism and failure location of the test circuits were investigated in this work.

Published in:

Reliability Physics Symposium (IRPS), 2011 IEEE International

Date of Conference:

10-14 April 2011