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For the first time we have reported thermal failure of FinFET devices related to fin thickness mismatch, under the normal operating condition. Pre and post failure characteristics are investigated. Furthermore, a detailed physical insight towards heat transport in a complex back-end of line (BEOL) of a logic circuit network is given for FinFET and extreme thin silicon on insulator (ETSOI) devices. Self heating behavior of both the FinFET and ETSOI devices is compared. Moreover, layout, device and technology design guidelines (based on complex 3D TCAD) are given for robust thermal management and electrical overstress / electrostatic discharge (EOS/ESD) reliability.