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A referenceless all-digital fast frequency acquisition full-rate CDR circuit for USB 2.0 in 65nm CMOS technology

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2 Author(s)
Ching-Che Chung ; Department of Computer Science and Information Engineering, National Chung Cheng University No. 168 University Rd, Ming-Hsiung, Chia-Yi, Taiwan, R.O.C. ; Wei-Cheng Dai

An all-digital fast frequency acquisition full-rate clock and data recovery (CDR) circuit for USB 2.0 applications without a reference clock is presented in this paper. The proposed digitally controlled oscillator (DCO) with an embedded time-to-digital converter (TDC) can recover the frequency of the synchronous data pattern in a very short time. In addition, the whole frequency acquisition can be finished within 31 cycles. A dual mode phase and frequency detector (PFD) is proposed to perform phase and frequency tracking with random data pattern to maintain the frequency and phase of the recovery clock. The proposed CDR circuit can operate at 480MHz for the USB 2.0 high-speed mode. The proposed CDR circuit can tolerance input data jitter up to 150ps with the bit error rate less than 10-12. The proposed CDR circuit is implemented in a standard process 65nm CMOS process, the core area is 150nm × 150nm, and the power consumption is 1.75mW (@480MHz).

Published in:

VLSI Design, Automation and Test (VLSI-DAT), 2011 International Symposium on

Date of Conference:

25-28 April 2011