By Topic

A low power secure logic style to counteract differential power analysis attacks

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Sana, P.K. ; Int. Inst. of Inf. Technol. - Hyderabad, Hyderabad, India ; Satyam, M.

An energy efficient logic which is resistant to differential power analysis attacks is proposed in this paper. It is used to provide security to several encrypting devices like smart cards. The combination of dual-rail logic for security and adiabatic approach for low power, leads to the proposed energy efficient secure logic style. The advantage of the proposed logic over the existing secure logic styles is the reduction in power consumption which is achieved by adiabatic approach. Hspice tool is used to simulate these ideas and a substantial improvement in power consumption over the existing logic styles is observed while maintaining security.

Published in:

VLSI Design, Automation and Test (VLSI-DAT), 2011 International Symposium on

Date of Conference:

25-28 April 2011