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A Hybrid Computing Platform Digital Wideband Receiver Design and Performance Measurement

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2 Author(s)
Kiran George ; Comput. Eng. Program, California State Univ., Fullerton, CA, USA ; Chien-In Henry Chen

As a modern radar receiver must rapidly search a large frequency range with maximum sensitivity, capabilities such as high instantaneous dynamic range (IDR), good multiple-signal-detection capability, wider bandwidth (BW), and high-frequency resolution are indispensable. Many techniques proposed to improve digital wideband receiver performance are computationally intensive and limit their real-time performance due to hardware constraint. In this paper, an innovative three gigasample-per-second hybrid computing platform digital wideband receiver system is presented, which employs two Nvidia Tesla C2050 graphics processor units and a Xilinx Virtex-5 field-programmable gate array for hardware acceleration to drastically improve receiver performance over its predecessor designs. The receiver detects five simultaneous signals in 1.25-GHz BW (125-1375 MHz) with a maximum IDR of 42.5 dB and a frequency resolution of 0.5 MHz. The proposed receiver architecture achieves high-resolution spectral estimation and employs a hardware mechanism for multiple-signal detection before the next set of data arrives for processing.

Published in:

IEEE Transactions on Instrumentation and Measurement  (Volume:60 ,  Issue: 12 )