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Wireless wafer-level testing of integrated circuits via capacitively-coupled channels

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3 Author(s)
Dae Young Lee ; Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, 48109, USA ; David D. Wentzloff ; John P. Hayes

Wafer testing via direct-contact probe cards has long been an effective and relatively low-cost method for testing integrated circuit (IC) chips prior to packaging. However, the physical contact occurring between the wafer and automatic test equipment (ATE) has significant costs due to contact point deformation and the need for abrasive cleaning. In this paper, we investigate a non-contact testing technique that wirelessly couples an IC wafer and ATE, and serves as an alternative to conventional probe-card testing. We derive several analytical models for a capacitive testing channel. Electromagnetic field simulations results are presented that support the proposed channel models. We conclude that capacitance-based wireless testing is feasible for testing ICs in the 1-GHz range.

Published in:

Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on

Date of Conference:

13-15 April 2011