Referenced Items are not available for this document.
Three-dimensional stacked ICs (3D-SICs) based on Through-Silicon Vias (TSVs) have many attractive benefits and hence are quickly gaining ground. Testing such products for manufacturing defects is still fraught with many challenges. This paper provides an overview of those challenges and their emerging solutions, categorized in the areas of (1) test flows, (2) test contents, and (3) test access.
Published in:
Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on
Date of Conference: 6-9 Dec. 2010
- Page(s):
- 544 - 547
- Print ISBN:
- 978-1-4244-7454-7
- INSPEC Accession Number:
- 12031030
- Conference Location :
- Kuala Lumpur
- Digital Object Identifier :
- 10.1109/APCCAS.2010.5775087
- Product Type:
- Conference Publications
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