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This paper presents the design methodology to recover charges in Analog-to-Digital Converter using adiabatic technique. Charge redistribution Successive Approximation Register (SAR) ADC is used as the main ADC architecture. The proposed ADC can operate in two modes - fast switching mode and adiabatic mode. In the fast switching mode, conventional DC supply is used and the ADC performs normal SAR ADC operation. In the adiabatic mode, resonant power supply is required and charges in the charge-redistribution DAC can be recovered through an adiabatic switch. The adiabatic switch is simulated using CSM 0.18μm CMOS technology. Simulation results show that the resonant power supply can recover 70% of the charges in the charge-redistribution DAC at a rate of 100kS/s with a 2V supply voltage.
Date of Conference: 6-9 Dec. 2010