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The thermal-aware floorplanning for 3D ICs using Carbon Nanotube

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3 Author(s)
Shengqing Shi ; Dept. of Electron. Eng., Tsinghua Univ. Beijing, Beijing, China ; Xi Zhang ; Rong Luo

Heat dissipation becomes one of the most serious challenges in three dimensional integrated circuits (3D ICs) designs. The through-silicon vias (TSVs) are effective on improving the thermal conductivity of 3D ICs. Many previous works have proposed thermal model for 3D ICs with TSVs, and formulated the TSV planning as a convex programming problem. On the other hand, besides excellent electrical and mechanical properties, thermal analysis of Carbon Nanotubes (CNTs) shows significant advantages in tall vias, indicating their promising applications as through-silicon vias in 3D ICs. In this paper, we integrate carbon nanotubes into the 3D ICs for inter layer connections. Thermal aware floor-planning approaches with TSV planning are also implemented. Experimental results show that compared to the copper TSVs, carbon nanotubes can reduce the total via number by over 89% for the same temperature.

Published in:

Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on

Date of Conference:

6-9 Dec. 2010