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Verification of MARTE/CCSL Time Requirements in Promela/SPIN

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3 Author(s)
Ling Yin ; Inst. of Software Eng., East China Normal Univ., Shanghai, China ; Mallet, F. ; Jing Liu

The Clock Constraint Specification Language (CCSL) provides expressions and relations to specify the time requirements and causal dependencies of systems. It was initially proposed, in the context of MARTE: the UML profile for Modeling and Analysis of Real-Time and Embedded Systems. In this paper, we propose a method to verify CCSL specifications. We give a formal state-based interpretation of a fundamental subset of CCSL clock constraints. Based on it, we translate a CCSL specification into a Promela model and feed the result into the model checker SPIN. Then we show some patterns for expressing the properties of the model and do the verification. A digital filter application is used as an example to illustrate the approach.

Published in:

Engineering of Complex Computer Systems (ICECCS), 2011 16th IEEE International Conference on

Date of Conference:

27-29 April 2011