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5-Gb/s Peak Detector Using a Current Comparator and a Three-State Charge Pump

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4 Author(s)
Jong-Hoon Kim ; Dept. of Electron. & Electr. Eng., Pohang Univ. of Sci. & Technol., Pohang, South Korea ; Jung-Bum Shin ; Jae-Yoon Sim ; Hong-June Park

A 5-Gb/s current-mode peak detector is proposed using a V-I converter, a current comparator, and a charge pump with three states (i.e., UP, DN, and HOLD). It eliminates the problem that a voltage error increases with an input data rate in a conventional peak detector circuit. In this brief, the voltage error between the measured input and output peak voltages is smaller than 5% for a pseudo-random binary sequence signal at a data rate up to 5 Gb/s, with an input voltage swing up to ±500 mV and an input common-mode voltage of 0.9 V. A chip fabricated in a 0.18-μm process gives the power consumption of 2.7 mW at a voltage supply of 1.8 V and a chip area of 150 μm × 120 μm.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:58 ,  Issue: 5 )