Referenced Items are not available for this document.
A technique for logic decomposition of asynchronous circuits which works on STG unfolding prefixes rather than state graphs is proposed. It retains all the advantages of the state space based approach, such as the possibility of multiway acknowledgement, latch utilisation and highly optimised circuits. Moreover, it significantly alleviates the state space explosion, and thus has superior memory consumption and runtime.
Published in:
Asynchronous Circuits and Systems (ASYNC), 2011 17th IEEE International Symposium on
Date of Conference: 27-29 April 2011
- Page(s):
- 3 - 12
- ISSN :
- 1522-8681
- Print ISBN:
- 978-1-61284-973-7
- INSPEC Accession Number:
- 12008153
- Conference Location :
- Ithaca, NY
- Digital Object Identifier :
- 10.1109/ASYNC.2011.10
- Product Type:
- Conference Publications
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
