Referenced Items are not available for this document.
In this paper, a low voltage low power (LPLV) current output stage (COS) with high CMRR is proposed. A novel common mode feedback (CMFB) technique is exploited to provide high CMRR. That is done by summing the main common mode signal and its opposite polarity one which provides over 112 dB of CMRR in 0.18 μm CMOS technology of TSMC. The circuit operates with very low supply voltages of ±0.5 V and consumes only 145 μW power which show good improvement compared to other similar stages in literatures. Monte Carlo simulation of CMRR is also performed and shows its sufficient robustness against mismatches.
Published in:
Computer Research and Development (ICCRD), 2011 3rd International Conference on
(Volume:3
)
Date of Conference: 11-13 March 2011
- Page(s):
- 382 - 386
- Print ISBN:
- 978-1-61284-839-6
- INSPEC Accession Number:
- 11975793
- Conference Location :
- Shanghai
- Digital Object Identifier :
- 10.1109/ICCRD.2011.5764219
- Product Type:
- Conference Publications
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