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Private cache partitioning: A method to reduce the off-chip missrate of concurrently executing applications in Chip-Multiprocessors

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4 Author(s)
Li Hao ; Dept. of Comput. Sci., Nat. Univ. of Defense Technol., Changsha, China ; Liu Tao ; Liu Guanghui ; Xie Lunguo

When there are several application running on Chip-Multiprocessors (CMPs), it is a problem to allocate the on-chip cache capacities between these competing applications. Cache partitioning is commonly used to solve this problem. Existing cache partitioning schemes either dedicate to the shared design or partition the last level cache depending on limited memory information. This paper presents Private Cache Partitioning, a low-overhead, runtime mechanism that partitions all of the private low level caches which are organized as a large shared cache by a distributed directory. The experiment results show that PCP reduces the overall missrate of competing applications and improves the throughput as well as the weighted speedup.

Published in:

Computer Research and Development (ICCRD), 2011 3rd International Conference on  (Volume:4 )

Date of Conference:

11-13 March 2011

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