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Large threshold voltage shifts (ΔVt) are experimentally observed in n-channel lateral DMOS transistors under high current-voltage regime. The effect is enhanced by the gate voltage as well as by the ambient temperature (TA) . By approximating the curves with the usually adopted power-law dependence (ΔVt = Atn), two different contributions are observed, and a clear increase of the exponent n is found. A numerical investigation is carried out, revealing that the electric field normal to the oxide interface (En) as well as the internal temperature (T) close to the source side of the MOS channel is mainly responsible for such enhanced degradation.